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Abstract: Considerable research has taken place in recent times in the area ofparameterization of software defined radio SDR architecture. Parameterizationdecreases the size of the software to be downloaded and also limits thehardware reconfiguration time. The present paper is based on the design anddevelopment of a programmable baseband modulator that perform the QPSKmodulation schemes and as well as its other three commonly used variants tosatisfy the requirement of several established 2G and 3G wireless communicationstandards. The proposed design has been shown to be capable of operating at amaximum data rate of 77 Mbps on Xilinx Virtex 2-Pro University fieldprogrammable gate array FPGA board. The pulse shaping root raised cosineRRC filter has been implemented using distributed arithmetic DA techniquein the present work in order to reduce the computational complexity, and toachieve appropriate power reduction and enhanced throughput. The designedmultiplier-less programmable 32-tap FIR-based RRC filter has been found towithstand a peak inter-symbol interference ISI distortion of -41 dBs



Autor: Indranil Hatai, Indrajit Chakrabarti

Fuente: https://arxiv.org/







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