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Modelling and Simulation in Engineering - Volume 2014 2014, Article ID 571374, 8 pages -

Research Article

Computer Engineering Department, Shahed University, Tehran, Iran

Department of Industrial Engineering, Amirkabir University of Technology, Tehran, Iran

Received 7 July 2013; Revised 18 November 2013; Accepted 19 November 2013; Published 4 February 2014

Academic Editor: Azah Mohamed

Copyright © 2014 Naser Mohammadzadeh et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


Physical design and synthesis are two key processes of quantum circuit design methodology. The physical design process itself decomposes into scheduling, mapping, routing, and placement. In this paper, a mathematical model is proposed for mapping, routing, and scheduling in ion-trap technology in order to minimize latency of the circuit. The proposed model which is a mixed integer linear programming MILP model gives the optimal locations for gates and the best sequence of operations in terms of latency. Experimental results show that our scheme outperforms the other schemes for the attempted benchmarks.

Autor: Naser Mohammadzadeh, Tayebeh Bahreini, and Hossein Badri

Fuente: https://www.hindawi.com/


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