A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D–Stacked ArchitectureReportar como inadecuado




A Customized Many-Core Hardware Acceleration Platform for Short Read Mapping Problems Using Distributed Memory Interface with 3D–Stacked Architecture - Descarga este documento en PDF. Documentación en PDF para descargar gratis. Disponible también para leer online.

Journal of Signal Processing Systems

, Volume 87, Issue 3, pp 327–341

First Online: 03 December 2016Received: 15 June 2015Revised: 07 September 2016Accepted: 08 November 2016DOI: 10.1007-s11265-016-1204-8

Cite this article as: Liu, P., Hemani, A., Paul, K. et al. J Sign Process Syst 2017 87: 327. doi:10.1007-s11265-016-1204-8

Abstract

Rapidly developing Next Generation Sequencing technologies produce huge amounts of short reads that consisting randomly fragmented DNA base pair strings. Assembling of those short reads poses a challenge on the mapping of reads to a reference genome in terms of both sensitivity and execution time. In this paper, we propose a customized many-core hardware acceleration platform for short read mapping problems based on hash-index method. The processing core is highly customized to suite both 2-hit string matching and banded Smith-Waterman sequence alignment operations, while distributed memory interface with 3D–stacked architecture provides high bandwidth and low access latency for highly customized dataset partitioning and memory access scheduling. Conformal with original BFAST program, our design provides an amazingly 45,012 times speedup over software approach for single-end short reads and 21,102 times for paired-end short reads, while also beats similar single FPGA solution for 1466 times in case of single end reads. Optimized seed generation gives much better sensitivity while the performance boost is still impressive.

KeywordsAccelerator architectures Application specific integrated circuits Bioinformatics Computational biology Coprocessors Three-dimensional integrated circuits 



Autor: Pei Liu - Ahmed Hemani - Kolin Paul - Christian Weis - Matthias Jung - Norbert Wehn

Fuente: https://link.springer.com/



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