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Abstract: One of the crucial steps in the design of an integrated circuit is theminimization of heating and temperature non-uniformity. Current temperaturecalculation methods, such as finite element analysis and resistor networks haveconsiderable computation times, making them incompatible for use in routing andplacement optimization algorithms. In an effort to reduce the computation time,we have developed a new method, deemed power blurring, for calculatingtemperature distributions using a matrix convolution technique in analogy withimage blurring. For steady state analysis, power blurring was able to predicthot spot temperatures within 1 degree C with computation times 3 orders ofmagnitude faster than FEA. For transient analysis the computation times whereenhanced by a factor of 1000 for a single pulse and around 100 for multiplefrequency application, while predicting hot spot temperature within about 1degree C. The main strength of the power blurring technique is that it exploitsthe dominant heat spreading in the silicon substrate and it uses superpositionprinciple. With one or two finite element simulations, the temperature pointspread function for a sophisticated package can be calculated. Additionalsimulations could be used to improve the accuracy of the point spread functionin different locations on the chip. In this calculation, we considered thedominant heat transfer path through the back of the IC chip and the heat sink.Heat transfer from the top of the chip through metallization layers and theboard is usually a small fraction of the total heat dissipation and it isneglected in this analysis.

Autor: T. Kemper, Y. Zhang, Z. Bian, A. Shakouri

Fuente: https://arxiv.org/

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