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In thispaper, novel ultra low voltage ULV dual-rail NOR gates are presented whichuse the semi-floating-gate SFG structure to speed up the logic circuit.Higher speed in the lower supply voltages and robustness against the inputsignal delay variations are the main advantages of the proposed gates incomparison to the previously reported domino dual-rail NOR gates. Thesimulation results in a typical TSMC 90 nm CMOS technology show that theproposed NOR gate is more than 20 times faster than conventional dual-rail NORgate.

KEYWORDS

Ultra Low Voltage ULV, Semi-Floating-Gate SFG, Speed, NOR Gate, Monte Carlo, TSMC 90 nm, CMOS

Cite this paper

Dadashi, A., Mirmotahari, O. and Berg, Y. 2016 NP-Domino, Ultra-Low-Voltage, High-Speed, Dual-Rail, CMOS NOR Gates. Circuits and Systems, 7, 1916-1926. doi: 10.4236-cs.2016.78166.





Autor: Ali Dadashi*, Omid Mirmotahari, Yngvar Berg

Fuente: http://www.scirp.org/



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