Transient simulation of power-supply noise in irregular on-chip power distribution networks using latency insertion method, and causal transient simulation of interconnects characterized by band-limited data and terminated by arbiReportar como inadecuado


Transient simulation of power-supply noise in irregular on-chip power distribution networks using latency insertion method, and causal transient simulation of interconnects characterized by band-limited data and terminated by arbi


Transient simulation of power-supply noise in irregular on-chip power distribution networks using latency insertion method, and causal transient simulation of interconnects characterized by band-limited data and terminated by arbi - Descarga este documento en PDF. Documentación en PDF para descargar gratis. Disponible también para leer online.

Power distribution networks PDNs are conducting structures employed in semiconductor systems with the aim of providing circuits with reliable and constant operating voltage. This network has non-neglible electrical parasitics. Consequently, when digital circuits inside the chip switch, the supply voltage delivered to them does not remain ideal and exhibits spatial and temporal voltage fluctuations. These fluctuations in the supply voltage, known as the power-supply noise PSN, can affect the functionality and the performance of modern microprocessors. The design of this PDN in the chip is an important part in ensuring power integrity. Modeling and simulation of the PSN in on-chip PDNs is important to reduce the cost of processors. These PDNs have irregular geometries, which affect the PSN. As a result, they have to be modeled. The problem sizes encountered in this simulation are usually large on the order of millions, necessitating computationally efficient simulation approaches. Existing approaches for this simulation do not guarantee at least one of the following three required properties: computationally efficiency, accuracy, and numerically robustness. Therefore, there is a need to develop accurate, numerically robust, and efficient algorithms for this simulation.For many interconnects e.g., transmission lines, board connectors, package PDNs, only their frequency responses and SPICE circuits e.g., nonlinear switching drivers, equivalent circuits of interconnects terminating them are known. These frequency responses are usually available only up to a certain maximum frequency. Simulating the electrical behavior of these systems is important for the reliable design of microprocessors and for their faster time-to-market. Because terminations can be nonlinear, a transient simulation is required. There is a need for a transient simulation of band-limited frequency-domain data characterizing a multiport passive system with SPICE circuits. The number of ports can be large greater than or equal to 100 ports. In this simulation, unlike in traditional circuit simulators, normal properties like stability and causality of transient results are not automatically met and have to be ensured. Existing techniques for this simulation do not guarantee at least one of the following three required properties: computationally efficiency for a large number of ports, causality, and accuracy. Therefore, there is a need to develop accurate and efficient time-domain techniques for this simulation that also ensure causality.The objectives of this Ph.D. research are twofold: 1 To develop accurate, numerically robust, and computationally efficient time-domain algorithms to compute PSN in on-chip PDNs with irregular geometries. 2 To develop accurate and computationally efficient time-domain algorithms for the causal cosimulation of band-limited frequency-domain data with SPICE circuits.



Georgia Tech Theses and Dissertations - School of Electrical and Computer Engineering Theses and Dissertations -



Autor: Lalgudi, Subramanian N. - -

Fuente: https://smartech.gatech.edu/







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