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A low drop-out LDO regulator for implantable artificial retina chip based on SMIC 0.18μm CMOS technology is presented. LDO input voltage range from 2.8 to 3.9V and the output voltage is 1.8V. Power Supply Rejection PSR is -70.02dB at 400Hz, temperature coefficient from -25 ℃ -100 ℃ can reach 12.35 ppm-℃. When supply voltage changes from 2.8V to 3.9V, line regulation is 0.74mV-V. Changes in load current from 0mA to 12mA, load regulation is 0.26mV-mV. The total power consumption is 125.4μW and layout area is 0.02mm 2 .The Circuit can meet the function of low-power, low temperature coefficient and high power supply rejection when ensuring other parameters.


implantable chip; LDO; power supply rejection

Cite this paper

Autor: Bo Wang, Xiuhan Li, Hanru Zhang, Di Wu

Fuente: http://www.scirp.org/


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