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International Journal of Reconfigurable ComputingVolume 2009 2009, Article ID 242981, 20 pages

Research ArticleLaboratoire d-Informatique, de Robotique et de Microélectronique de Montpellier LIRMM, Centre National de la Recherche Scientifique CNRS, University of Montpellier 2, 161 rue Ada, 34392 Montpellier, France

Received 19 December 2008; Accepted 14 April 2009

Academic Editor: J. Manuel Moreno

Copyright © 2009 Gabriel Marchesan Almeida et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.


Multiprocessor Systems-on-Chips MPSoCs offersuperior performance while maintaining flexibility and reusabilitythanks to software oriented personalization. While mostMPSoCs are today heterogeneous for better meeting the targetedapplication requirements, homogeneous MPSoCs may becomein a near future a viable alternative bringing other benefitssuch as run-time load balancing and task migration. The workpresented in this paper relies on a homogeneous NoC-basedMPSoC framework we developed for exploring scalable andadaptive on-line continuous mapping techniques. Each processorof this system is compact and runs a tiny preemptive operatingsystem that monitors various metrics and is entitled to takeremapping decisions through code migration techniques. Thisapproach that endows the architecture with decisional capabilitiespermits refining application implementation at run-time accordingto various criteria. Experiments based on simple policies arepresented on various applications that demonstrate the benefitsof such an approach.

Autor: Gabriel Marchesan Almeida, Gilles Sassatelli, Pascal Benoit, Nicolas Saint-Jean, Sameer Varyani, Lionel Torres, and Michel R



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