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* Corresponding author 1 AVALON - Algorithms and Software Architectures for Distributed and HPC Platforms Inria Grenoble - Rhône-Alpes, LIP - Laboratoire de l-Informatique du Parallélisme 2 ENS Lyon - École normale supérieure - Lyon 3 LIP - Laboratoire de l-Informatique du Parallélisme 4 IRIT - Institut de recherche en informatique de Toulouse

Abstract : Hardware monitoring through performance counters is available on almost all modern processors. Although these counters are originally designed for performance tuning, they have also been used for evaluating power consumption. We propose two approaches for modelling and understanding the behaviour of high performance computing HPC systems relying on hardware monitoring counters. We evaluate the effectiveness of our system modelling approach considering both optimising the energy usage of HPC systems and predicting HPC applications- energy consumption as target objectives. Although hardware monitoring counters are used for modelling the system, other methods - including partial phase recognition and cross platform energy prediction - are used for energy optimisation and prediction. Experimental results for energy prediction demonstrate that we can accurately predict the peak energy consumption of an application on a target platform; whereas, results for energy optimisation indicate that with no a priori knowledge of workloads sharing the platform we can save up to 24\% of the overall HPC system-s energy consumption under benchmarks and real-life workloads.

Autor: Ghislain Landry Tsafack Chetsa - Laurent Lefèvre - Jean-Marc Pierson - Patricia Stolf - Georges Da Costa -

Fuente: https://hal.archives-ouvertes.fr/


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