Polychrony for refinement-based designReportar como inadecuado




Polychrony for refinement-based design - Descarga este documento en PDF. Documentación en PDF para descargar gratis. Disponible también para leer online.

1 ESPRESSO - Synchronous programming for the trusted component-based engineering of embedded systems and mission-critical systems IRISA - Institut de Recherche en Informatique et Systèmes Aléatoires, Inria Rennes – Bretagne Atlantique 2 FERMAT Lab 3 CSE-UCSD - Department of Computer Science and Engineering San Diego

Abstract : System design based on the so-called -synchronous hypothesis- consists of abstracting the nonfunctional implementation details of a system away and let one benefit from a focused reasoning on the logics behind the instants at which the system functionalities should be secured. From this point of view, synchronous design models and languages provide intuitive models for integrated circuits. This affinity explains the ease of generating synchronous circuits and verify their functionalities using compilers and related tools that implement this approach. In the relational model of the SIGNAL-POLYCHRONY design language-platform this affinity goes beyond the domain of purely synchronous circuits to embrace the context of architectures consisting of synchronous circuits and desynchronization protocols: GALS architectures. The unique features of this model are to provide the notion of polychrony: the capability to describe multiclocked or partially clocked circuits and systems; and to support formal design refinement, from the early stages of requirements specification, to the later stages of synthesis and deployment, and by using formal verification techniques.

Keywords : asynchronous circuits clocks formal specification formal verification high level synthesis GALS architectures SIGNAL-POLYCHRONY design language-platform asynchronous system desynchronization protocols formal design refinement hardware-software co-design high-level synthesis integrated circuit intuitive models multiclocked circuits partially clocked circuits relational modeling requirements specification synchronous design models synchronous hypothesis system design





Autor: Jean-Pierre Talpin - Paul Le Guernic - Sandeep Shukla - R.K. Gupta - Frédéric Doucet -

Fuente: https://hal.archives-ouvertes.fr/



DESCARGAR PDF




Documentos relacionados