WCET analysis in shared resources real-time systems with TDMA busesReportar como inadecuado

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1 VERIMAG - IMAG - VERIMAG 2 University of Luxemburg

Abstract : Predictability is an important aspect in real-time and safety-critical systems, where non-functional properties – such as the timing behavior – have high impact on the system cor-rectness. As many safety-critical systems have a growing performance demand, simple, but outdated architectures are not sufficient anymore. Instead, multi-core systems are more and more popular, even in the real-time domain. To combine the performance benefits of a multi-core architecture with the required predictability, Time Division Multiple Access TDMA buses are often advocated. In this paper, we are interested in accesses to shared resources in such environments. Our approach uses SMT Satisfiability Modulo Theory to encode the semantics and execution time of the analyzed program in an environment with shared resources. We use an SMT-solver to find a solution that corresponds to the execution path with correct semantics and maximal execution time. We propose to model a shared bus with TDMA arbitration policy. Using examples, we show how the WCET estimation is enhanced by combining the semantics and the shared bus analysis in SMT.

Keywords : wcet tdma worst-case execution time bus multi-core smt

Autor: Hamza Rihani - Matthieu Moy - Claire Maiza - Sebastian Altmeyer -

Fuente: https://hal.archives-ouvertes.fr/


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