Intra-gate fault diagnosis of CMOS integrated circuitsReportar como inadecuado

Intra-gate fault diagnosis of CMOS integrated circuits - Descarga este documento en PDF. Documentación en PDF para descargar gratis. Disponible también para leer online.

Reference: Fan, Xinyue., (2006). Intra-gate fault diagnosis of CMOS integrated circuits. DPhil. University of Oxford.Citable link to this page:


Intra-gate fault diagnosis of CMOS integrated circuits

Abstract: Knowing the root cause of why an Integrated Circuit (1C) device fails to functionproperly is the key to provide the corrective measures to increase the yield and shortenthe time to market. In recent years, electrical fault diagnosis method has receivedgrowing attention due to the effective and indispensable guiding role it plays in modernfault localization practice when physical measures are more and more confined by theshrinking feature size and condensed internal structure.While most of the fault diagnosis tools are based on gate level fault models, manyfaults are actually at the transistor level (the intra-gate fault). This thesis provides aninnovative method to diagnose the intra-gate faults. It covers a wide range of differenttypes of intra-gate faults. The method extends the capability of gate level faultdiagnosis tools to the intra-gate domain by building connections with these intra-gatefaults to particular types of gate level faults. Intra-gate faults are transformed to gatelevel representations so that they can be diagnosed directly by the widely available andwell developed gate level diagnosis tools. Real diagnosis of intra-gate faults from waferdata and physical failure analysis photos are provided as solid proofs of theeffectiveness of this method.

Type of Award:DPhil Level of Award:Doctoral Awarding Institution: University of Oxford Notes:The digital copy of this thesis has been made available thanks to the generosity of Dr Leonard Polonsky


Moore, WillMore by this contributor



Will MooreMore by this contributor


 Bibliographic Details

Issue Date: 2006Identifiers

Urn: uuid:0cd2ed35-1e98-427e-a402-a27fd50752d1

Source identifier: 603828306 Item Description

Type: Thesis;

Language: eng Subjects: Integrated circuits Fault tolerance Tiny URL: td:603828306


Autor: Fan, Xinyue. - institutionUniversity of Oxford facultyMathematical and Physical Sciences Division - - - - Contributors Moore, Wil



Documentos relacionados