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Analog Integrated Circuits and Signal Processing

, Volume 77, Issue 3, pp 385–399

First Online: 31 October 2013Received: 10 June 2013Revised: 16 September 2013Accepted: 23 September 2013

Abstract

A prototype vision chip has been designed that incorporates a 20 × 64 array of processing elements on a 31 μm pitch. Each processor element includes 14 bits of digital memory in addition to seven analogue registers. Digital operands include NOR and NOT with operations of diffusion, subtraction, inversion and squaring available in the analogue domain. The cells of the array can be configured as an asynchronous propagation network allowing operations such as flood filling to occur with times of ~1 μs across the array. Exploiting this feature allows the chip to recognise the difference between closed and open shapes at 30,000 frames per second. The chip is fabricated in 0.18 μm CMOS technology.

KeywordsVision chip Smart sensor Asynchronous image processing Cellular processor array  Download fulltext PDF



Autor: Stephen J. Carey - David R. W. Barr - Bin Wang - Alexey Lopich - Piotr Dudek

Fuente: https://link.springer.com/



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